PIPELINE MULTIPLIER OF POLYNOMIALS MODULO WITH ANALYSIS OF HIGH-ORDER BITS OF THE MULTIPLIER

Аннотация

Among public-key cryptosystems, cryptosystems built on the basis of a polynomial system of
residual classes are special. Because in these systems, arithmetic operations are performed at high speed. There are
many algorithms for encrypting and decrypting data presented in the form of polynomials. The paper considers data
encryption based on the multiplication of polynomials modulo irreducible polynomials. In such a multiplier, the
binary image of a multiply polynomial can serve as a fragment of encrypted text. The binary image of the multiplier
polynomial is the secret key and the binary representation of the irreducible polynomial is the module.
Existing sequential polynomial multipliers and single-cycle matrix polynomial multipliers modulo do not
provide the speed required by the encryption block. The paper considers the possibility of multiplying polynomials
modulo on a Pipeline in which architectural techniques are laid in order to increase computing performance.
In the conclusion of the work, the time gain of the multiplication modulo is shown by the example of the
multiplication of five triples of polynomials. Verilog language was used to describe the scheme of the Pipeline
multiplier. Used FPGA Artix-7 from Xilinx companies.
The developed Pipeline multiplier can be used for cryptosystems based on a polynomial system of residual
classes, which can be implemented in hardware or software.