@article{Aitkhozhayeva Yevgeniya Zhamalkhanovna_Seilova Nurgul Abadullaevna_Tynymbayev Sakhybay_Tereikovska Liudmyla Alekseevna_Imanbayev Azamat Zhanatuly_2019, title={METHOD AND DEVICE FOR MODULUS REDUCTION}, url={https://journals.nauka-nanrk.kz/bulletin-science/article/view/1748}, abstractNote={<p>Is considered the possibility of accelerating one of the basic time-critical operations for the asymmetric cryptographic algorithm RSA - modulus reduction. The method for fast determination of residue of number<br>by modulus and its implementation offered. Is used the idea of increased module. Alternative methods of modulus<br>reduction are known, they require large hardware cost. Is developed device for modulus reduction, characterized by<br>high speed with optimal costs hardware. For the calculations used combinational circuits that are characterized by<br>high speed and low cost hardware. Is considered the step by step the work of device and the illustrative examples.<br>Device can be used in cryptoprocessors, in digital computing systems to accelerate the division operation, for<br>formation elements of finite fields, in computing systems using modular arithmetic.</p>}, number={2}, journal={Научный журнал «Вестник НАН РК» }, author={Aitkhozhayeva Yevgeniya Zhamalkhanovna and Seilova Nurgul Abadullaevna and Tynymbayev Sakhybay and Tereikovska Liudmyla Alekseevna and Imanbayev Azamat Zhanatuly}, year={2019}, month={апр.}, pages={220–225} }